A through-wafer etch step is presently required to expose and suspend active-area porous nanomembranes. Porous nanomembranes are typically less than 100 nm thick and, thus, are restricted to less than 1 mm in one dimension in most embodiments to maintain their integrity and resistance to mechanical forces such as differential pressure or handling during assembly into exemplary devices. This restriction limits the amount of active membrane area available for functional applications.
The use of wet chemical etching with, for example, ethylenediamine pyrocatechol (EDP), to expose and suspend porous nanomembranes disposed on a Si wafer, results in approximately 55° sloping side-walls of openings etched through <1-0-0> orientation Si wafers due to its anisotropic etching. This characteristic constrains the number of active membranes that can be placed side-by-side within a device, and thus, physically limits the active membrane area that can be incorporated with <1-0-0> wafers. Alternative Si orientations such as <1-1-0> would permit through-wafer etching with straight side-walls, thus closer spacing between suspended membranes. However, the distance between the suspended membrane and the through-wafer opening (i.e., the Si wafer thickness), as well as the overall device geometry, would both remain less than optimal.
Etching through the entire thickness of the Si wafer is also required to define both outer chip dimensions and suspended membrane active area. The thickness of the Si wafer remnant imposes significant and unnecessary additional volume between the suspended, porous nanomembrane and the through-wafer opening. This problem is further exaggerated when gasketing material is bonded to the through-wafer-etched side of a device for fluidic purposes, since the gaskets inevitably contribute additional thickness, volume, and step-heights. This increases diffusional distances and, consequently, reduces mass transfer rates when porous nanomembranes are used in filtration or separation applications. Thus, device geometry and etching method improvements are needed to improve mass transfer capacity within devices incorporating porous nanomembranes.